搜索资源列表
CoreFIR_RTL-3.0
- actelIP核 的fircore Core Generator – Executable File Outputs Run-Time Library (RTL) Code and Testbench Based on Input Parameters – Self-Checking – Executable Tests Generated Output against Algorithm • Distributed Arithmetic (DA) Algori
ug623Libraries-Guide-for-HDL-Designs
- Xilinx 官方 HDL 设计库指导，FPGA设计人员的好帮手-Xilinx HDL design library official guidance, FPGA designers a good helper
virtex2_pkgs_zip(1)
- Alter公司的Vertex系列FPGA芯片的封装库-Alter' s Vertex series FPGA chip package library
include_c_to_verilog
- catapult c函数库，可以进行fpga定点仿真，非常有价值。-catapult c library
Mojo-Hexapod-Blob
- Verilog library for Mojo V3 FPGA development board
sha1_v01
- sha1_testbench.v -- Testbench with vectors NIST FIPS 180-2 sha1_exec.v -- Top level sha1 module sha1_round.v -- primitive sha1 round dffhr.v -- generic parameterizable D-flip flop library Performance Analysis Performance equa
md5
- md5算法的vhdl实现，并配有测试用例，并没有使用任何xilinx的library，用modelsim se进行仿真-md5 algorithm based on fpga in vhdl
modulation
- 基于FPGA的QPSK调制library ieee use ieee.std_logic_1164.all -FPGA QPSK modulation
ejpgl
- 不需要os的jpeg編碼器 能夠嵌入在沒有os的fpga上或是在linux-It is an open source JPEG codec library, including both encoder and decoder. Different to other implementations, it is designed for embedded system and is aware of the need of embedded systems. Some advanta
VmodCAM_Ref_HD Demo_13
- This project has dependencies in the 'digilent' VHDL library. For your convenience a local copy of these dependencies are included in the remote_sources directory. The VmodCAM_Ref_HD demo project was built around an Atlys+VmodCAM setup. The proj
神武内挂汉化（支持WIN7）
- Descr iption: The design of music box based on FPGA realizes the circular playback of multiple music or the selection of one music in the music library.